标题： 基于数据传输顺序的NoC-DNN加速器位转换减少 显示英文标题

标题： Bit Transition Reduction by Data Transmission Ordering in NoC-based DNN Accelerator

摘要： 随着深度神经网络（DNN）变得越来越重要，基于网络芯片（NoC）的DNN加速器越来越受欢迎。为了节省链路功耗，许多研究人员专注于减少位转换（BT）。我们提出了一种基于'1'位计数的排序方法，以减少DNN工作负载的BT。我们提供了所提出的排序方法有效性的数学证明。我们通过无NoC和有NoC的实验评估了我们的方法。在无NoC的情况下，我们提出的排序方法分别实现了浮点数-32数据20.38%的BT减少和定点数-8数据55.71%的BT减少。我们提出了两种数据排序方法，关联排序和分离排序，以联合或单独处理权重和输入，并将它们应用于在基于NoC的DNN加速器中运行完整的DNN。我们在各种配置下评估了我们的方法，包括不同的DNN模型，如LeNet和DarkNet，不同大小的NoC以及不同数量的存储控制器，随机权重和训练权重，以及不同的数据精度。我们的方法通过实现浮点数-32数据32.01%的BT减少和定点数-8数据40.85%的BT减少，有效地减少了链路功耗。 显示英文摘要

摘要： As Deep Neural Networks (DNN) are becoming essential, Network-on-Chip (NoC)-based DNN accelerators gained increasing popularity. To save link power in NoC, many researchers focus on reducing the Bit Transition (BT). We propose '1'-bit count-based ordering method to reduce BT for DNN workloads. We provide a mathematical proof of the efficacy of proposed ordering. We evaluate our method through experiments without NoC and with NoC. Without NoC, our proposed ordering method achieves up to 20.38% BT reduction for floating-point-32 data and 55.71% for fixed-point-8 data, respectively. We propose two data ordering methods, affiliated-ordering and separated-ordering to process weight and input jointly or individually and apply them to run full DNNs in NoC-based DNN accelerator. We evaluate our approaches under various configurations, including different DNN models such as LeNet and DarkNet, various NoC sizes with different numbers of memory controllers, random weights and trained weights, and different data precision. Our approach efficiently reduces the link power by achieving up to 32.01% BT reduction for floating-point-32 data and 40.85% BT reduction for fixed-point-8 data.