标题： 深度最优量子布局综合作为SAT问题 显示英文标题

标题： Depth-Optimal Quantum Layout Synthesis as SAT

摘要： 量子电路由作用于量子比特的门组成。当前的量子硬件平台对二进制 CX 门施加了连接性限制。因此，在量子电路可以执行之前，布局综合是将其转换为可执行形式的重要步骤。由于 CX 门是有噪声的，减少映射电路中的 CX 数量或 CX 深度非常重要。我们提供了一种新的高效 SAT 编码来解决量子电路布局综合问题。之前的 SAT 编码主要关注门数量和 CX 门数量。我们的编码则保证能找到具有最小电路深度或最小 CX 门深度的映射电路。我们使用增量 SAT 求解和并行计划来实现高效的编码。与保证深度最优性的 OLSQ2 相比，这带来了超过 10 到 100 倍的速度提升。但是，最小化深度仍然比使用 Q-Synth 最小化门数量花费更多时间。我们通过模拟在减少 (CX) 数量和 (CX) 深度后的电路，来关联所实现的噪声减少效果。我们发现，针对 (CX) 数量进行最小化比针对 (CX) 深度进行最小化更能有效减少噪声。然而，同时考虑 (CX) 数量和 (CX) 深度提供了最佳的噪声减少效果。 显示英文摘要

摘要： Quantum circuits consist of gates applied to qubits. Current quantum hardware platforms impose connectivity restrictions on binary CX gates. Hence, Layout Synthesis is an important step to transpile quantum circuits before they can be executed. Since CX gates are noisy, it is important to reduce the CX count or CX depth of the mapped circuits. We provide a new and efficient encoding of Quantum-circuit Layout Synthesis in SAT. Previous SAT encodings focused on gate count and CX-gate count. Our encoding instead guarantees that we find mapped circuits with minimal circuit depth or minimal CX-gate depth. We use incremental SAT solving and parallel plans for an efficient encoding. This results in speedups of more than 10-100x compared to OLSQ2, which guarantees depth-optimality. But minimizing depth still takes more time than minimizing gate count with Q-Synth. We correlate the noise reduction achieved by simulating circuits after (CX)-count and (CX)-depth reduction. We find that minimizing for CX-count correlates better with reducing noise than minimizing for CX-depth. However, taking into account both CX-count and CX-depth provides the best noise reduction.