标题： ForgeHLS：一个大规模的开源数据集用于高级综合 显示英文标题

标题： ForgeHLS: A Large-Scale, Open-Source Dataset for High-Level Synthesis

摘要： 我们引入了ForgeEDA，这是一个跨多种类别的开源全面电路数据集。 ForgeEDA包括各种电路表示形式，如寄存器传输级（RTL）代码、映射后（PM）网表、与非门图（AIGs）和布局网表，从而实现全面的分析和开发。 我们通过在关键任务如功耗、性能和面积（PPA）优化上对最先进的EDA算法进行基准测试，展示了ForgeEDA的实用性，突显了其暴露性能差距和推动进步的能力。 此外，ForgeEDA的规模和多样性有助于训练用于EDA任务的AI模型，展示了其提升模型性能和泛化能力的潜力。 通过解决现有数据集的局限性，ForgeEDA旨在促进现代集成电路设计的突破，并支持EDA领域的下一代创新。 显示英文摘要

摘要： We introduce ForgeEDA, an open-source comprehensive circuit dataset across various categories. ForgeEDA includes diverse circuit representations such as Register Transfer Level (RTL) code, Post-mapping (PM) netlists, And-Inverter Graphs (AIGs), and placed netlists, enabling comprehensive analysis and development. We demonstrate ForgeEDA's utility by benchmarking state-of-the-art EDA algorithms on critical tasks such as Power, Performance, and Area (PPA) optimization, highlighting its ability to expose performance gaps and drive advancements. Additionally, ForgeEDA's scale and diversity facilitate the training of AI models for EDA tasks, demonstrating its potential to improve model performance and generalization. By addressing limitations in existing datasets, ForgeEDA aims to catalyze breakthroughs in modern IC design and support the next generation of innovations in EDA.