标题： 每行激活计数在真实硬件上的应用：解析性能开销 显示英文标题

标题： Per-Row Activation Counting on Real Hardware: Demystifying Performance Overheads

摘要： 基于行的激活计数（PRAC），一种缓解DRAM读取干扰的方法，修改了关键的DRAM定时参数，据报道在基于模拟器的研究中导致了显著的性能开销。 然而，鉴于模拟器与真实硬件之间的已知差异，真实机器实验对于准确评估PRAC的性能至关重要。 我们提供了对PRAC的第一个真实机器性能分析。 在使用微基准测试验证最新CPU上的定时修改后，我们的分析显示，对于SPEC CPU2017工作负载，PRAC的平均和最大开销仅为1.06%和3.28%——比基于模拟器的报告低多达9.15倍。 此外，我们表明，紧密页面策略通过有效隐藏由于PRAC而延长的DRAM行预充电操作，从而最小化了这一开销，使其远离关键路径。 显示英文摘要

摘要： Per-Row Activation Counting (PRAC), a DRAM read disturbance mitigation method, modifies key DRAM timing parameters, reportedly causing significant performance overheads in simulator-based studies. However, given known discrepancies between simulators and real hardware, real-machine experiments are vital for accurate PRAC performance estimation. We present the first real-machine performance analysis of PRAC. After verifying timing modifications on the latest CPUs using microbenchmarks, our analysis shows that PRAC's average and maximum overheads are just 1.06% and 3.28% for the SPEC CPU2017 workloads -- up to 9.15x lower than simulator-based reports. Further, we show that the close page policy minimizes this overhead by effectively hiding the elongated DRAM row precharge operations due to PRAC from the critical path.