标题： 无故障模拟计算与不完美硬件 显示英文标题

标题： Fault-Free Analog Computing with Imperfect Hardware

摘要： 随着对边缘计算和人工智能需求的增长，研究者们开始利用忆阻器进行模拟内存计算，这种计算方式通过在内存内部直接计算来克服数据移动瓶颈。 然而，器件故障和变化会严重影响模拟系统的精度和可靠性。 现有的容错技术，如冗余和重新训练，在高精度应用或需要固定矩阵和隐私保护的场景中往往不够。 在此，我们引入并实验验证了一种无故障的矩阵表示方法，其中目标矩阵被分解为两个可调节子矩阵的乘积，并编程到模拟硬件上。 这种间接、自适应的表示方法使数学优化能够绕过故障器件并消除差分对，显著提高计算密度。 我们的基于忆阻器的系统在39%器件故障率的情况下，实现了离散傅里叶变换矩阵的>99.999%余弦相似度，这种保真度在传统直接表示方法中无法实现，因为单个器件故障（0.01%的故障率）就会导致失败。 我们在无线通信中展示了56倍的比特错误率降低，并且与最先进的技术相比，密度提高了>196%，能效提高了179%。 这种方法在忆阻器上得到验证，适用于新兴存储器和非电子计算基板，表明器件良率不再是模拟计算硬件的主要瓶颈。 显示英文摘要

摘要： The growing demand for edge computing and AI drives research into analog in-memory computing using memristors, which overcome data movement bottlenecks by computing directly within memory. However, device failures and variations critically limit analog systems' precision and reliability. Existing fault-tolerance techniques, such as redundancy and retraining, are often inadequate for high-precision applications or scenarios requiring fixed matrices and privacy preservation. Here, we introduce and experimentally demonstrate a fault-free matrix representation where target matrices are decomposed into products of two adjustable sub-matrices programmed onto analog hardware. This indirect, adaptive representation enables mathematical optimization to bypass faulty devices and eliminate differential pairs, significantly enhancing computational density. Our memristor-based system achieved >99.999% cosine similarity for a Discrete Fourier Transform matrix despite 39% device fault rate, a fidelity unattainable with conventional direct representation, which fails with single device faults (0.01% rate). We demonstrated 56-fold bit-error-rate reduction in wireless communication and >196% density with 179% energy efficiency improvements compared to state-of-the-art techniques. This method, validated on memristors, applies broadly to emerging memories and non-electrical computing substrates, showing that device yield is no longer the primary bottleneck in analog computing hardware.