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Mathematical Physics

arXiv:1307.0987 (math-ph)
[Submitted on 3 Jul 2013 ]

Title: The maximum voltage drop in an on-chip power distribution network: analysis of square, triangular and hexagonal power pad arrangements

Title: 芯片内电源分布网络中的最大电压降:方形、三角形和六边形电源垫布置的分析

Authors:Tom Carroll, Joaquim Ortega-Cerdà
Abstract: A mathematical model of the voltage drop which arises in on-chip power distribution networks is used to compare the maximum voltage drop in the case of different geometric arrangements of the pads supplying power to the chip. These include the square or Manhattan power pad arrangement which currently predominates, as well as equilateral triangular and hexagonal arrangements. In agreement with findings in the literature and with physical and SPICE models, the equilateral power pad arrangement, independent of the underlying power mesh configuration, is found to minimize the maximum voltage drop. This headline finding is a consequence of relatively simple formulas for the voltage drop, with explicit error bounds, which are established using complex analysis techniques, and elliptic functions in particular.
Abstract: 一种用于比较芯片内电源分配网络中电压降的数学模型,用于比较不同几何排列的焊盘在为芯片供电时的最大电压降。 这些包括目前占主导地位的正方形或曼哈顿电源焊盘排列,以及等边三角形和六边形排列。 与文献中的发现以及物理模型和SPICE模型一致,发现无论底层电源网格配置如何,等边电源焊盘排列都能最小化最大电压降。 这一主要发现是由于使用复分析技术,特别是椭圆函数,建立了具有显式误差界限的相对简单的电压降公式。
Subjects: Mathematical Physics (math-ph)
Cite as: arXiv:1307.0987 [math-ph]
  (or arXiv:1307.0987v1 [math-ph] for this version)
  https://doi.org/10.48550/arXiv.1307.0987
arXiv-issued DOI via DataCite
Journal reference: Eur. J. Appl. Math 25 (2014) 531-551
Related DOI: https://doi.org/10.1017/S0956792514000114
DOI(s) linking to related resources

Submission history

From: Joaquim Ortega-Cerdà [view email]
[v1] Wed, 3 Jul 2013 12:28:20 UTC (21 KB)
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