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Electrical Engineering and Systems Science > Systems and Control

arXiv:2212.05397 (eess)
[Submitted on 11 Dec 2022 ]

Title: Task modules Partitioning, Scheduling and Floorplanning for Partially Dynamically Reconfigurable Systems Based on Modern Heterogeneous FPGAs

Title: 任务模块 基于现代异构FPGA的部分动态可重配置系统的划分、调度和布局规划

Authors:Bo Ding, Jinglei Huang, Junpeng Wang, Qi Xu, Song Chen, Yi Kang
Abstract: Modern field programmable gate array(FPGA) can be partially dynamically reconfigurable with heterogeneous resources distributed on the chip. And FPGA-based partially dynamically reconfigurable system(FPGA-PDRS) can be used to accelerate computing and improve computing flexibility. However, the traditional design of FPGA-PDRS is based on manual design. Implementing the automation of FPGA-PDRS needs to solve the problems of task modules partitioning, scheduling, and floorplanning on heterogeneous resources. Existing works only partly solve problems for the automation process of FPGA-PDRS or model homogeneous resource for FPGA-PDRS. To better solve the problems in the automation process of FPGA-PDRS and narrow the gap between algorithm and application, in this paper, we propose a complete workflow including three parts, pre-processing to generate the list of task modules candidate shapes according to the resources requirements, exploration process to search the solution of task modules partitioning, scheduling, and floorplanning, and post-optimization to improve the success rate of floorplan. Experimental results show that, compared with state-of-the-art work, the proposed complete workflow can improve performance by 18.7\%, reduce communication cost by 8.6\%, on average, with improving the resources reuse rate of the heterogeneous resources on the chip. And based on the solution generated by the exploration process, the post-optimization can improve the success rate of the floorplan by 14\%.
Abstract: 现代可编程逻辑门阵列(FPGA)可以在芯片上部分动态地重新配置,具有异构资源的分布。 并且 基于FPGA的部分动态可重构系统(FPGA-PDRS)可以用于加速计算并提高计算灵活性。 然而,传统的FPGA-PDRS设计是基于手动设计的。 实现FPGA-PDRS的自动化需要解决在异构资源上的任务模块划分、调度和布局规划问题。 现有的工作仅部分解决了FPGA-PDRS自动化过程中的问题或对FPGA-PDRS的同构资源进行了建模。 为了更好地解决FPGA-PDRS自动化过程中的问题并缩小算法与应用之间的差距,在本文中,我们提出一个完整的流程,包括三个部分:预处理阶段根据资源需求生成任务模块候选形状列表,探索过程搜索任务模块划分、调度和布局规划的解决方案,以及后优化阶段以提高布局规划的成功率。 实验结果表明,与最先进的工作相比,所提出的完整流程平均可以提高性能18.7%,减少通信成本8.6%,同时提高芯片上异构资源的重用率。 并且基于探索过程生成的解决方案,后优化可以提高布局规划的成功率14%。
Subjects: Systems and Control (eess.SY)
Cite as: arXiv:2212.05397 [eess.SY]
  (or arXiv:2212.05397v1 [eess.SY] for this version)
  https://doi.org/10.48550/arXiv.2212.05397
arXiv-issued DOI via DataCite

Submission history

From: Bo Ding [view email]
[v1] Sun, 11 Dec 2022 03:33:30 UTC (1,813 KB)
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