标题： 带有滞后介电层的SET的电导 显示英文标题

标题： Conductance of a SET with a retarded dielectric layer in the gate capacitor

摘要： 我们研究了在栅极电容器中放置铁电（或电介质）层的单电子晶体管（SET）的电导。 我们假设铁电（FE）具有滞后的响应，其弛豫时间任意。 我们表明，在铁电（电介质）层“快速”但仍然滞后的响应情况下，会出现对库仑阻塞效应的额外贡献，导致SET电导的抑制。 我们使用蒙特卡罗模拟考虑了FE（电介质）极化的涨落。 对于“快速”FE，这些涨落部分抑制了额外的库仑阻塞效应。 通过蒙特卡罗模拟，我们研究了从“快速”FE到“慢速”FE的转变。 对于高温情况，SET电导的峰值几乎与FE弛豫时间无关。 对于接近FE居里温度的温度，电导峰值随FE弛豫时间的变化呈非单调依赖。 当FE弛豫时间与SET放电时间数量级相同时，会出现一个最大值。 在居里点以下，电导峰值随着FE弛豫时间的增加而减小。 在FE转变点以下的温度下，无论FE弛豫时间如何，电导都表现出迟滞行为。 我们证明，电导迟滞行为对FE内部涨落具有鲁棒性。 显示英文摘要

摘要： We study conductance of a single electron transistor (SET) with a ferroelectric (or dielectric) layer placed in the gate capacitor. We assume that ferroelectric (FE) has a retarded response with arbitrary relaxation time. We show that in the case of "fast" but still retarded response of the FE (dielectric) layer an additional contribution to the Coulomb blockade effect appears leading to the suppression of the SET conductance. We take into account fluctuations of the FE (dielectric) polarization using Monte-Carlo simulations. For "fast" FE these fluctuations partially suppress the additional Coulomb blockade effect. Using Monte-Carlo simulations we study the transition from "fast" to "slow" FE. For high temperatures the peak value of the SET conductance is almost independent of the FE relaxation time. For temperatures close to the FE Curie temperature the conductance peak value non-monotonically depends on the FE relaxation time. A maximum appears when the FE relaxation time is of the order of the SET discharging time. Below the Curie point the conductance peak value decreases with increasing the FE relaxation time. The conductance shows the hysteresis behavior for any FE relaxation time at temperatures below the FE transition point. We show that conductance hysteresis is robust against FE internal fluctuations.