标题： 一种平衡的忆阻器-CMOS三值逻辑系列及其应用 显示英文标题

标题： A balanced Memristor-CMOS ternary logic family and its application

摘要： 基于忆阻器和传统CMOS器件的平衡三进制数字逻辑电路设计被提出。 首先，系统地设计并验证了平衡三进制最小门TMIN、最大门TMAX和三进制反相器，然后在此基础上设计了三进制编码器、解码器和多路复用器等逻辑电路。 然后，采用两种不同的方案实现了平衡三进制半加器、乘法器和数值比较器等功能组合逻辑电路的设计。 最后，我们报告了一系列对两种设计方案的比较和分析，为后续三值逻辑电路的研究和开发提供了参考。 显示英文摘要

摘要： The design of balanced ternary digital logic circuits based on memristors and conventional CMOS devices is proposed. First, balanced ternary minimum gate TMIN, maximum gate TMAX and ternary inverters are systematically designed and verified by simulation, and then logic circuits such as ternary encoders, decoders and multiplexers are designed on this basis. Two different schemes are then used to realize the design of functional combinational logic circuits such as a balanced ternary half adder, multiplier, and numerical comparator. Finally, we report a series of comparisons and analyses of the two design schemes, which provide a reference for subsequent research and development of three-valued logic circuits.