标题： ChipSeek-R1：通过分层奖励驱动强化学习生成超越人类的RTL 显示英文标题

标题： ChipSeek-R1: Generating Human-Surpassing RTL with LLM via Hierarchical Reward-Driven Reinforcement Learning

摘要： 大型语言模型（LLMs）在自动化寄存器传输级（RTL）代码生成方面展现出显著的潜力。 然而，当前的方法面临一个关键挑战：它们无法同时优化功能正确性和硬件质量（功耗、性能、面积 - PPA）。 基于监督微调的方法通常生成功能正确但PPA次优的代码，缺乏学习优化原则的机制。 相比之下，试图在生成后改进PPA指标的后处理技术通常效率低下，因为它们在不更新LLM参数的情况下外部运行，从而无法提升模型的内在设计能力。 为了弥补这一差距，我们引入了ChipSeek-R1，这是一种分层奖励驱动的强化学习框架，用于训练LLMs生成同时实现功能正确性和优化PPA指标的RTL代码。 ChipSeek-R1采用分层奖励系统，在强化学习过程中结合对语法、功能正确性（来自仿真器）和PPA指标（来自综合工具）的直接反馈。 这使得模型能够通过试错学习复杂的硬件设计权衡，生成既功能正确又PPA优化的RTL代码。 在标准基准测试（VerilogEval，RTLLM）上评估ChipSeek-R1，我们在功能正确性方面取得了最先进的结果。 值得注意的是，在RTLLM基准测试中，ChipSeek-R1生成的27个RTL设计在PPA指标上超过了原始人工编写的代码。 我们的研究结果证明了将工具链反馈整合到LLM训练中的有效性，并突显了强化学习在实现超越人类的RTL代码自动生成方面的潜力。 我们将在匿名GitHub上开源我们的代码。 显示英文摘要

摘要： Large Language Models (LLMs) show significant potential for automating Register-Transfer Level (RTL) code generation. However, current approaches face a critical challenge: they can not simultaneously optimize for functional correctness and hardware quality (Power, Performance, Area - PPA). Methods based on supervised fine-tuning often generate functionally correct but PPA-suboptimal code, lacking mechanisms to learn optimization principles. In contrast, post-processing techniques that attempt to improve PPA metrics after generation are often inefficient because they operate externally without updating the LLM's parameters, thus failing to enhance the model's intrinsic design capabilities. To bridge this gap, we introduce ChipSeek-R1, a hierarchical reward-driven reinforcement learning framework to train LLMs to generate RTL code that achieves both functional correctness and optimized PPA metrics. ChipSeek-R1 employs a hierarchical reward system, which incorporates direct feedback on syntax, functional correctness (from simulators) and PPA metrics (from synthesis tools) during reinforcement learning. This enables the model to learn complex hardware design trade-offs via trial-and-error, generating RTL code that is both functionally correct and PPA-optimized. Evaluating ChipSeek-R1 on standard benchmarks (VerilogEval, RTLLM), we achieve state-of-the-art results in functional correctness. Notably, on the RTLLM benchmark, ChipSeek-R1 generated 27 RTL designs surpassing the PPA metrics of the original human-written code. Our findings demonstrate the effectiveness of integrating toolchain feedback into LLM training and highlight the potential for reinforcement learning to enable automated generation of human-surpassing RTL code. We open-source our code in anonymous github.