标题： SLDB：用于LLM辅助设计的端到端异构片上系统基准测试套件 显示英文标题

标题： SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design

摘要： 近年来，大型语言模型（LLMs）已成为电子设计自动化（EDA）的一种有价值的工具。 LLM辅助设计的最先进研究已经展示了LLMs生成语法正确的RTL代码的能力，显示出将人工智能整合到硬件设计过程中的令人鼓舞的前景。 这些进展的关键推动因素是高质量基准的可用性，用于评估新方法。 然而，现有的数据集和基准在系统级设计方面存在不足，因为它们主要关注组件级信息和低复杂度设计。 为了解决这一差距，我们引入了系统级设计基准（SLDB），这是一个专为评估LLMs在系统级集成和配置任务中的性能而设计的数据集。 SLDB包括一个经过筛选的基准套件，包含10个基础片上系统（SoC）设计，其组件可以通过一个合成库组合成指数级的不同的基于瓷砖的SoCs。 该数据集提供了完整的SoC配置、加速器集成代码、通信参数和面向加速器的系统配置，以及与ESP平台[1]兼容的测试应用程序代码。 显示英文摘要

摘要： Over the last few years, Large Language Models (LLMs) have emerged as a valuable tool for Electronic Design Automation (EDA). State-of-the-art research in LLM-aided design has demonstrated the ability of LLMs to generate syntactically correct RTL code, showcasing encouraging prospects for integrating AI into the hardware design process. A key enabler of these advancements is the availability of high-quality benchmarks to evaluate new approaches. However, existing datasets and benchmarks fall short of system-level design, as they focus primarily on component-level information and low-complexity designs. To address this gap, we introduce the System-Level Design Benchmark (SLDB), a dataset tailored for evaluating LLMs in system-level integration and configuration tasks. SLDB includes a curated benchmark suite of 10 baseline SoC designs, whose components can be combined into an exponential number of distinct tile-based SoCs through a synthetic library. The dataset provides full SoC configurations, accelerator integration code, communication parameters, and accelerator-aware system configurations, along with testing-application code, compatible with the ESP platform[1].