标题： 数字事件驱动人工智能加速器中的高效突触延迟实现 显示英文标题

标题： Efficient Synaptic Delay Implementation in Digital Event-Driven AI Accelerators

摘要： 神经网络模型的突触延迟参数化一直未被广泛研究，但近期文献显示了有希望的结果，表明延迟参数化模型比具有类似性能（例如任务准确性）的非延迟参数化模型更简单、更小、更稀疏，因此更节能。我们引入了共享循环延迟队列（SCDQ），这是一种用于在数字类脑加速器上支持突触延迟的新硬件结构。我们的分析和硬件结果表明，它在内存方面具有更好的扩展性，比当前常用的的方法更好，并且更容易进行算法-硬件协同优化，在这种情况下，内存扩展由模型稀疏性调节，而不仅仅是网络规模。除了内存外，我们还报告了延迟、面积和每次推理的能量性能。 显示英文摘要

摘要： Synaptic delay parameterization of neural network models have remained largely unexplored but recent literature has been showing promising results, suggesting the delay parameterized models are simpler, smaller, sparser, and thus more energy efficient than similar performing (e.g. task accuracy) non-delay parameterized ones. We introduce Shared Circular Delay Queue (SCDQ), a novel hardware structure for supporting synaptic delays on digital neuromorphic accelerators. Our analysis and hardware results show that it scales better in terms of memory, than current commonly used approaches, and is more amortizable to algorithm-hardware co-optimizations, where in fact, memory scaling is modulated by model sparsity and not merely network size. Next to memory we also report performance on latency area and energy per inference.