标题： 一种每125 ns出现扫描错误的55-nm SRAM芯片用于事件级软错误测量 显示英文标题

标题： A 55-nm SRAM Chip Scanning Errors Every 125 ns for Event-Wise Soft Error Measurement

摘要： 我们开发了一种55纳米CMOS SRAM芯片，该芯片每125纳秒扫描一次所有数据，并通过FIFO通过SPI接口输出带时间戳的软错误数据。 所提出的系统由开发的芯片和粒子探测器组成，能够实现逐事件的软错误测量，并精确识别SBUs和MCUs，从而解决传统方法无法区分的误分类问题，如伪MCU和远距离MCU。 在东北大学RARiS进行的80兆电子伏质子照射实验验证了系统的运行。 成功同步了SRAM芯片和粒子探测器之间的时间戳，考虑了由辐射引起的PLL干扰。 通过确定具有亚纳秒分辨率的重置偏移量实现了事件构建，并保持了数微米内的空间同步。 显示英文摘要

摘要： We developed a 55 nm CMOS SRAM chip that scans all data every 125 ns and outputs timestamped soft error data via an SPI interface through a FIFO. The proposed system, consisting of the developed chip and particle detectors, enables event-wise soft error measurement and precise identification of SBUs and MCUs, thus resolving misclassifications such as Pseudo- and Distant MCUs that conventional methods cannot distinguish. An 80-MeV proton irradiation experiment at RARiS, Tohoku University verified the system operation. Timestamps between the SRAM chip and the particle detectors were successfully synchronized, accounting for PLL disturbances caused by radiation. Event building was achieved by determining a reset offset with sub-ns resolution, and spatial synchronization was maintained within several tens of micrometers.